Provides the portion of the parameterized IR interface that is used to construct the SSA stages
of the IR. The raw stage of the IR does not expose these predicates.
These predicates are all just aliases for predicates defined in the
Cached module. This ensures
that all of SSA construction will be evaluated in the same stage.
Represents the memory location accessed by a memory operand or memory result. In this implementation, the location is one of the following: -